1.Participate in the Chip packacing solution desian , and responsible for the DFM implementation and competitiveness of chip packaging solutions; 

2. Responsbhle tor cip padkadino re ted N manactumd and enainermg proces ualty asuance, proces taure amays, proces mprovemnt and mpementaton, and completethe tanste from NPI to svM and HVM production; 

3.Responsible for the development of new chip materials and new packaging technology applications;

4. Responsible for reulary oroanizing supplier exchandes e.a.0TR),sortind out supolier capabilities, and providin capabity support for packadind solution desian5.通过技术维度支持 5.Support the supply chain and procurement system through the technical dimension to maintain a competitive supplier partnership.

1.Major in electronics, materials, etc., master's degree or above;

2.More than 5 years of relevant work experience in packaging;

3.Experience in packaging factory, foundry supplier and material supplier is preferred; 

4.Familiar with the process flow and key process sites of different packaging types, and experience in product reliability is preferred;

5.Familiar with statistical analysis methods, experience in packaging process analysis tools is preferred.